1. Field of the Invention
The embodiments disclosed herein relate to a memory array structure and an associated method of operating the memory array structure such that the on-state and off-state wordline voltages have different temperature coefficients for optimum performance. The embodiments disclosed herein also related to a voltage reference circuit that can be incorporated into a voltage regulation circuit for generating such a memory array structure.
2. Description of the Related Art
Oftentimes memory array structures such as, embedded dynamic random access memory (eDRAM) array structures, incorporate a bandgap voltage reference circuit to provide a single bandgap reference voltage (VBGR) for regulating multiple different voltage supplies. For example, the same VBGR may be used to regulate a relatively low off-state wordline voltage, which is also referred to herein as the wordline low voltage (VWLL); to regulate a relatively high wordline on-state voltage, which is also referred to herein as the wordline high voltage (VWLH); to clamp a sensing reference at a maximum voltage and to regulate a bitline voltage (VBL). Typically, bandgap voltage reference circuits are designed such that this single bandgap reference voltage (VBGR) has a substantially neutral (i.e., 0-value or flat) temperature coefficient (TC) so that the resulting supply voltages (e.g., VWLL, VWLH, VBL, etc.) remain constant despite any changes in temperature. However, as technology scales to 32 nm and smaller, it may be advantageous to regulate one or more of these supply voltages as a function of temperature.